Difference: MassStorage (19 vs. 20)
Revision 202019-02-09 - PeterSchmid
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
%DASHBOARD{ section="banner" | ||||||||
| Line: 62 to 62 | ||||||||
| ||||||||
| Changed: | ||||||||
| < < | ||||||||
| > > | ||||||||
| Sharing the LED and Switch port, you loose three LEDs and one switch or IN. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011). To prevent this, set the EEPROM into HOLD state e.g. with the WAIT signal. | ||||||||
| Line: 78 to 78 | ||||||||
| ||||||||
| Changed: | ||||||||
| < < |  | |||||||
| > > |
| |||||||
| Raspberry Pi can emulate SPI EEPROM. On RaspiElf the switches/LEDs are already connected to Raspi's GPIOs. No need for additional hardware. But I have to write an SPI server for the Raspberry Pi. Raspi's SPI interfaces can't be used because of conflicting port usage. | ||||||||
| Line: 86 to 87 | ||||||||
Read Byte | ||||||||
| Changed: | ||||||||
| < < | CS0 EQU 0b1101111 CS1 EQU 0b0010000 CLK0 EQU 0b1011111 CLK1 EQU 0b0100000 DATA0 EQU 0b0111111 DATA1 EQU 0b1000000 ; MSB first READBYTE: LDI 0 PLO R5 LDI 0xFF PHI R6 LDI 0xFF - 8 PLO R6 SEX R0 BITLOOP: INC R6 GHI R6 ; set CARRY SHRC GLO R5 B4 SETBIT ; branch if bit set | |||||||
| > > | LDI 01H PLO R4 ; for the carry PLO R5 ; reset all bits LDI 8 ; counting down 8 times PLO R6 ; bit counter RDBITLOOP GLO R4 ; set CARRY SHR GLO R5 ; get bits BN4 SETBIT ; branch if bit set (EF4 == 0) | |||||||
| SHL ; bit not set | ||||||||
| Changed: | ||||||||
| < < | SKP SETBIT: SHLC SAVEBIT: PLO R5 OUT4 BYTE 0b01000000 ; CLK for SPI OUT4 BYTE 0b00000000 | |||||||
| > > | SKP ; BR SAVEBIT SETBIT SHLC ; set bit SAVEBIT OUT P4 ; CLK on for SPI BYTE 01000000B OUT P4 ; CLK off BYTE 00000000b PLO R5 ; save bits DEC R6 | |||||||
| GLO R6 | ||||||||
| Changed: | ||||||||
| < < | BNZ BITLOOP | |||||||
| > > | BNZ RDBITLOOP | |||||||
about 230 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s @ 1.79 MHz
Write Byte | ||||||||
| Changed: | ||||||||
| < < | WRITEBYTE: LDI 0 PHI R6 LDI 8 | |||||||
| > > | WRITEBYTE PLO R5 ; save transmit byte LDI 8 ; counter 8 bits | |||||||
| PLO R6 | ||||||||
| Changed: | ||||||||
| < < | SEX R0 BITLOOP: GLO R5 ; get the next bit SHLC , next bit is in the carry | |||||||
| > > | WRBITLOOP GLO R5 ; get the next bit SHL ; next bit is in the carry | |||||||
| PLO R5 | ||||||||
| Changed: | ||||||||
| < < | BDF SETBIT OUT P4 BYTE 0b01000000 ; CLK for SPI with data bit cleared OUT P4 BYTE 0b00000000 BR NEXT SETBIT: OUT P4 BYTE 0b11000000 ; CLK for SPI with data bit set OUT P4 BYTE 0b10000000 NEXT: DEC R6 | |||||||
| > > | BDF BITSET OUT P4 ; bit cleared BYTE 00000000B OUT P4 ; clock on BYTE 01000000B OUT P4 ; clock off BYTE 00000000B BR WRTEST BITSET OUT P4 ; bit set BYTE 10000000B OUT P4 ; clock on BYTE 11000000B OUT P4 ; clock off BYTE 10000000B WRTEST DEC R6 | |||||||
| GLO R6 | ||||||||
| Changed: | ||||||||
| < < | BNZ BITLOOP | |||||||
| > > | ||||||||
|
EEPROM patched on MC PCB
| ||||||||
| Line: 331 to 315 | ||||||||
Mini Boot Loader
Mini Boot LoaderFor RAM only Membership Cards you need some kind of bootstrap loader. To type in a monitor or even BASIC or FORTH is nearly impossible. Serial EEPROMs in DIP8 packages are cheap and easy to get. But you still have to use the front panel to type in the boot loader itself (this is the first-stage boot loader). | ||||||||
| Added: | ||||||||
| > > |
The "patched on MC PCB" boot loader takes about 25 s for 32 KiB, the DB25 variant takes about 29 s. For the sources see https://github.com/spyren/RaspiElf/tree/master/eeprom . | |||||||
; TITL "EEPROM Boot Loader for Elf Memebership Card"
; EJCT 60
| ||||||||
| Line: 523 to 511 | ||||||||
| ||||||||
| Added: | ||||||||
| > > |
| |||||||
View topic | History: r23 < r22 < r21 < r20 | More topic actions...
Copyright © 2008-2025 by the contributing authors. All material on this collaboration platform is the property of the contributing authors. Ideas, requests, problems regarding TWiki? Send feedback