Difference: McForth (10 vs. 11)

Revision 112019-01-18 - PeterSchmid

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Serial EEPROM Connected to Centronics Connector (Switches and LEDs)

Changed:
<
<		Sharing the LED and Switch port, you loose two LEDs and one switch. Conflict with the bootstrap loader, some sort of disable EEPROM needed e.g. switch or jumper.
>
>		Sharing the LED and Switch port, you loose two LEDs and one switch. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011).
 
SPI MC (Master) AT25xxx (Slave) Interface
Changed:
<
<
MISO J2.9 IN7 SWITCH7 2 SO direct
>
>
MISO J2.9 IN7 SWITCH7 (IN? EF4) 2 SO diode e.g. 1N4148
 
MOSI J2.11 O7 LED7 5 SI direct
CLK J2.10 O6 LED6 6 SCK direct
Changed:
<
<
CS ? O5 LED5 1 CS Pullup 10 k, switch to GND
>
>
CS J2.12 O5 LED5 1 CS direct
 
  P4.3 VDD 8 VCC +5V
  " 3 WP +5V
  " 7 HOLD +5V
Line: 211 to 211
  Raspberry Pi can emulate SPI EEPROM. On RaspiElf the switches/LEDs are already connected to Raspi's GPIOs. No need for additional hardware. But I have to write an SPI server for the Raspberry Pi.
Added:
>
>		Raspi's SPI interfaces can't be used because of conflicting port usage.
  • BCM 19 (SPI1 MISO) O5
  • BCM 20 (SPI1 MOSI) -
  • BCM 21 (SPI1 SCLK) shutdown
  • BCM 18 (SPI1 CS0) CLR-
  • BCM 17 (SPI1 CS1) WAIT-

  • BCM 9 (SPI0 MISO) IN4
  • BCM 10 (SPI0 MOSI) IN3
  • BCM 11 (SPI0 SCLK) IN6
  • BCM 8 (SPI0 CS0) IN7
  • BCM 7 (SPI0 CS1) O0
 

Serial EEPROM patched on MC PCB

Changed:
<
<		SPI Mode 0, data is always latched in on the rising edge of SCK and always output on the falling edge of SCK.
>
>		SPI Mode 0, data is always latched in on the rising edge of SCK and always output on the falling edge of SCK. For CS one output port bis is needed e.g. O7.
 
SPI MC (Master) AT25xxx (Slave) Interface
MISO /EF2 2 SO direct
MOSI D0 5 SI direct
CLK TPB & N1 (OUT2) 6 SCK wired AND; Pullup 10 k, 2 1N4148
Changed:
<
<
CS ? 1 /CS GND
>
>
CS J2.11 O7 LED7 1 /CS direct
 
    8 VCC +5V
    3 /WP +5V
    7 /HOLD +5V
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