Difference: WatchDog (2 vs. 3)

Revision 32021-12-29 - PeterSchmid

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How to use

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watchdog     ( -- )        Activate watchdog
watchdog?    ( -- flag )   Has the WATCHDOG bitten?
watchdog#    ( -- u )      How many times has the watchdog bitten since cold startup?

If thread takes longer than about 500 ms the watchdog will bite and a reset occurs. As long the thread waits for an event e.g. file operation, keyboard (the thread is blocked), nothing happens.

: forever begin again ; [RET] ok.
watchdog? .[RET] 0  ok.
watchdog[RET]  ok.
forever[RET] BOOM
Mecrisp-Stellaris RA 2.5.4 by Matthias Koch.

Mecrisp-Cube 1.4.4 for STM32WB55, 63/128 KiB RAM/FLASH dictionary (C) 2021 peter@spyr.ch
  * Firmware Package STM32Cube FW_WB V1.11.0, USB-CDC, BLE Stack 5.0 (C) 2021 STMicroelectronics
  * CMSIS-RTOS V2 FreeRTOS wrapper, FreeRTOS Kernel V10.3.1 (C) 2020 Amazon.com
  * FatFs for internal flash and microSD - Generic FAT fs module  R0.12c (C) 2017 ChaN
  * tiny vi - part of BusyBox (C) 2000, 2001 Sterling Huxley

watchdog? .[RET] -1  ok.
watchdog# .[RET] 1  ok.

Do not activate the watchdog in debugging mode.

watchdog? [IF] .( Watchdog has bitten, # bites: ) watchdog# . cr [THEN]
 

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How to Create a Thread

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Implementation

For STM32WB55:

WWDG clock (Hz) = PCLK1 / (4096 * Prescaler)

PCLK1 is 32 MHz, Prescaler is 64, 
clock = 32 MHz / (4096 * 64) = 122 Hz

WWDG timeout (mS) = 1000 * (T[5;0] + 1) / WWDG clock (Hz)

timeout = 1000 * 64 / 122 = 524 ms
window  = 1000 * 48 / 122 = 393 ms

I choose 450 ms period to feed the watchdog.

 
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RTC registers are used for accounting the watchdog bites. Those registers are not affected by the reset.
 
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For implementation details see:
 
 
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